Lauterbach extends their industry leading TRACE32® debug and trace tools to include support for Synopsys’ RISC-V instruction set based ARC-V™ processor IP. This support includes full debug and trace of the ARC-V processor IP, including those on vendor-specific hardware implementations, support for virtual targets and TRACE32® Instruction Set Simulators (ISS).
Lauterbach’s industry-leading TRACE32® debug and trace tools will be extended to include support for the full range of Synopsys ARC-V processors, including the high-performance 64-bit RPX, real-time 32-bit RHX, and ultra-low power 32-bit RMX series.
Synopsys and Lauterbach engineering teams are working closely together to implement TRACE32 support for ARC-V IP. As a result, semiconductor suppliers who implement ARC-V cores on their chips, as well as their customers who develop world class embedded applications, can rely on using the same TRACE32® GUI and user experience for debug and trace that has been successfully used for more than 150 architectures and 10,000 chips.
Lauterbach has played a key role in the RISC-V Foundation working groups that have defined debug and trace standards for RISC-V-based CPUs. Leading companies in the automotive value chain, from chip manufacturers to Tier 1s, have already committed to the RISC-V architecture.
The TRACE32® tools consist of the universal PowerView debug and trace software and debug and trace accelerator modules. While Lauterbach's intelligent PowerDebug modules offer the fastest download speeds and shortest response times for efficient debugging and test automation, the PowerTrace real-time trace modules provide complete insight into what the CPUs and other cores of an embedded system are doing without affecting its real-time performance in any way. Trace analysis, including code coverage measurements, can help bring embedded designs to market faster, safer, and more reliably.
TRACE32® enables simultaneous debugging and tracing of the CPU and other cores in an SoC, a unique capability that covers the entire system. It does not matter whether the system is SMP (symmetric multiprocessing), AMP (asymmetric multiprocessing), or iAMP (integrated asymmetric multiprocessing). Lauterbach's innovative iAMP debug and trace technology enables the debugging of multicore systems with identical CPU instruction sets in a single TRACE32® PowerView GUI.
“Synopsys' ARC-V processor IP will be widely used in the automotive and other embedded markets,” said Norbert Weiss, Managing Director of Lauterbach GmbH. "As a leading tool provider in the RISC-V universe, it is, therefore, a matter of course for us to be able to support our existing and future customers in their ARC-V IP projects right from the start.”
“Given the increasing complexity of RISC-V-based designs, having robust debug and trace capabilities is crucial for identifying and resolving issues early in the development process to speed time-to-market and enhance overall system reliability,” said Mick Posner, vice president of IP product management at Synopsys. "The extension of Lauterbach’s TRACE32® tools to support Synopsys ARC-V processor IP will enable our mutual customers to accelerate their development cycles and bring innovative, high-performance embedded solutions to market more efficiently.“
A video explaining how designers can benefit from the combination of TRACE32® for RISC-V and Synopsys ARC-V™ can be viewed here: https://youtu.be/BXi7a2owqFA?si=3mFDVw69dZj6IF10
Lauterbach’s industry-leading TRACE32® debug and trace tools will be extended to include support for the full range of Synopsys ARC-V processors, including the high-performance 64-bit RPX, real-time 32-bit RHX, and ultra-low power 32-bit RMX series.
Synopsys and Lauterbach engineering teams are working closely together to implement TRACE32 support for ARC-V IP. As a result, semiconductor suppliers who implement ARC-V cores on their chips, as well as their customers who develop world class embedded applications, can rely on using the same TRACE32® GUI and user experience for debug and trace that has been successfully used for more than 150 architectures and 10,000 chips.
Lauterbach has played a key role in the RISC-V Foundation working groups that have defined debug and trace standards for RISC-V-based CPUs. Leading companies in the automotive value chain, from chip manufacturers to Tier 1s, have already committed to the RISC-V architecture.
The TRACE32® tools consist of the universal PowerView debug and trace software and debug and trace accelerator modules. While Lauterbach's intelligent PowerDebug modules offer the fastest download speeds and shortest response times for efficient debugging and test automation, the PowerTrace real-time trace modules provide complete insight into what the CPUs and other cores of an embedded system are doing without affecting its real-time performance in any way. Trace analysis, including code coverage measurements, can help bring embedded designs to market faster, safer, and more reliably.
TRACE32® enables simultaneous debugging and tracing of the CPU and other cores in an SoC, a unique capability that covers the entire system. It does not matter whether the system is SMP (symmetric multiprocessing), AMP (asymmetric multiprocessing), or iAMP (integrated asymmetric multiprocessing). Lauterbach's innovative iAMP debug and trace technology enables the debugging of multicore systems with identical CPU instruction sets in a single TRACE32® PowerView GUI.
“Synopsys' ARC-V processor IP will be widely used in the automotive and other embedded markets,” said Norbert Weiss, Managing Director of Lauterbach GmbH. "As a leading tool provider in the RISC-V universe, it is, therefore, a matter of course for us to be able to support our existing and future customers in their ARC-V IP projects right from the start.”
“Given the increasing complexity of RISC-V-based designs, having robust debug and trace capabilities is crucial for identifying and resolving issues early in the development process to speed time-to-market and enhance overall system reliability,” said Mick Posner, vice president of IP product management at Synopsys. "The extension of Lauterbach’s TRACE32® tools to support Synopsys ARC-V processor IP will enable our mutual customers to accelerate their development cycles and bring innovative, high-performance embedded solutions to market more efficiently.“
A video explaining how designers can benefit from the combination of TRACE32® for RISC-V and Synopsys ARC-V™ can be viewed here: https://youtu.be/BXi7a2owqFA?si=3mFDVw69dZj6IF10
