"At Renesas, we are faced with the challenge to tape out large volumes of 45-nm designs with severe schedule constraints," said Hitoshi Sugihara, department manager, DFM & Digital EDA Technology Dept., Design and Development Unit at Renesas Technology Corp. "We selected Proteus OPC since it meets our technology, schedule, and costs requirements. This decision will enable us to sustain our leadership in microcontrollers and semiconductor system solutions."
Proteus delivers near-linear scalability so that designers can efficiently utilize hundreds of cores, allowing them to balance turnaround-time with cost. Proteus is the only tool that enables users to effectively manage technology requirements, turnaround time and cost through the inclusion of both frequency- and space-domain simulation engines. With this capability, users can deploy the more accurate frequency-domain engine for the most critical layers and utilize the faster space-domain engine for the non-critical layers. ProGen, Proteus' highly customizable solution calibrates a single model that is utilized by both the space- and frequency-domain engines.
"As a leading semiconductor system solutions provider focusing on cutting-edge designs, Renesas has a critical need for an OPC solution that reduces turnaround time and cost," said Howard Ko, senior vice president and general manager of the Silicon Engineering Group at Synopsys. "Renesas' adoption of Synopsys Proteus OPC is proof that Synopsys' technology is the best solution to address these advanced design requirements."